? semiconductor components industries, llc, 2008 april, 2008 - rev. 0 1 publication order number: ntmfs4847n/d ntmfs4847n power mosfet 30 v, 85 a, single n-channel, so-8 fl features ? low r ds(on) to minimize conduction losses ? low capacitance to minimize driver losses ? optimized gate charge to minimize switching losses ? thermally enhanced so-8 package ? these are pb-free device applications ? cpu power delivery ? dc-dc converters ? low side switching maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value unit drain-to-source voltage v dss 30 v gate-to-source voltage v gs 16 v continuous drain current r ja (note 1) steady state t a = 25 c i d 18 a t a = 85 c 13 power dissipation r ja (note 1) t a = 25 c p d 2.21 w continuous drain current r ja 10 sec t a = 25 c i d 29.5 a t a = 85 c 21 power dissipation r ja, t 10 sec t a = 25 c p d 5.8 w continuous drain current r ja (note 2) t a = 25 c i d 11.5 a t a = 85 c 8.2 power dissipation r ja (note 2) t a = 25 c p d 0.88 w continuous drain current r jc (note 1) t c = 25 c i d 85 a t c = 85 c 61 power dissipation r jc (note 1) t c = 25 c p d 48.1 w pulsed drain current t p =10 s t a = 25 c i dm 170 a current limited by package t a = 25 c i dmaxpkg 100 a operating junction and storage temperature t j , t stg -55 to +150 c source current (body diode) i s 48 a drain to source dv/dt dv/dt 6 v/ns single pulse drain-to-source avalanche energy (v dd = 50 v, v gs = 10 v, i l = 33 a pk , l = 0.3 mh, r g = 25 eas 163 mj lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. so-8 flat lead case 488aa style 1 marking diagram http://onsemi.com a = assembly location y = year ww = work week = pb-free package 4847n ayww 1 v (br)dss r ds(on) max i d max 30 v 4.1 m @ 10 v 85 a 6.2 m @ 4.5 v g (4) s (1,2,3) n-channel mosfet d (5,6) device package shipping ? ordering information ntmfs4847nt1g so-8fl (pb-free) 1500 / tape & reel NTMFS4847NT3G so-8fl (pb-free) 5000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d. s s s g d d d d *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and m ounting techniques reference manual, solderrm/d. (note: microdot may be in either location)
ntmfs4847n http://onsemi.com 2 thermal resistance maximum ratings parameter symbol value unit junction-to-case (drain) r jc 2.6 c/w junction-to-ambient C steady state (note 1) r ja 56.6 junction-to-ambient C steady state (note 2) r ja 142 junction-to-ambient - t 10 sec r ja 21.6 1. surface-mounted on fr4 board using 1 sq-in pad, 1 oz cu. 2. surface-mounted on fr4 board using the minimum recommended pad size. electrical characteristics (t j = 25 c unless otherwise specified) parameter symbol test condition min typ max unit off characteristics drain-to-source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a 30 v drain-to-source breakdown voltage temperature coefficient v (br)dss / t j 25 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 24 v t j = 25 c 1 a t j = 125 c 10 gate-to-source leakage current i gss v ds = 0 v, v gs = 16 v 100 na on characteristics (note 3) gate threshold voltage v gs(th) v gs = v ds , i d = 250 a 1.45 1.8 2.5 v negative threshold temperature coefficient v gs(th) /t j 5.2 mv/ c drain-to-source on resistance r ds(on) v gs = 10 v to 11.5 v i d = 30 a 3.2 4.1 m i d = 15 a 3.2 v gs = 4.5 v i d = 30 a 5.0 6.2 i d = 15 a 5.0 forward transconductance g fs v ds = 1.5 v, i d = 30 a 74 s charges and capacitances input capacitance c iss v gs = 0 v, f = 1 mhz, v ds = 12 v 2614 pf output capacitance c oss 466 reverse transfer capacitance c rss 241 total gate charge q g(tot) v gs = 4.5 v, v ds = 15 v; i d = 30 a 19.2 28 nc threshold gate charge q g(th) 1.6 gate-to-source charge q gs 7.3 gate-to-drain charge q gd 6.1 total gate charge q g(tot) v gs = 11.5 v, v ds = 15 v, i d = 30 a 43.8 nc switching characteristics (note 4) turn-on delay time t d(on) v gs = 4.5 v, v ds = 15 v, i d = 15 a, r g = 3.0 17.7 ns rise time t r 53 turn-off delay time t d(off) 21 fall time t f 8.7 3. pulse test: pulse width 300 s, duty cycle 2%. 4. switching characteristics are independent of operating junction temperatures.
ntmfs4847n http://onsemi.com 3 electrical characteristics (t j = 25 c unless otherwise specified) parameter unit max typ min test condition symbol switching characteristics (note 4) turn-on delay time t d(on) v gs = 11.5 v, v ds = 15 v, i d = 15 a, r g = 3.0 10.5 ns rise time t r 20.8 turn-off delay time t d(off) 28.1 fall time t f 6.5 drain-source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 30 a t j = 25 c 0.8 1.0 v t j = 125 c 0.7 reverse recovery time t rr v gs = 0 v, di s /dt = 100 a/ s, i s = 30 a 15.4 ns charge time t a 8.2 discharge time t b 7.2 reverse recovery charge q rr 6.0 nc package parasitic values source inductance l s t a = 25 c 0.93 nh drain inductance l d 0.005 gate inductance l g 1.84 gate resistance r g 0.9 3. pulse test: pulse width 300 s, duty cycle 2%. 4. switching characteristics are independent of operating junction temperatures. typical characteristics figure 1. on-region characteristics figure 2. transfer characteristics v ds , drain-to-source voltage (v) v gs , gate-to-source voltage (v) 6 5 4 3 2 1 0 0 10 20 30 40 80 90 110 6 5 4 3 2 1 0 0 20 40 60 80 120 i d , drain current (a) i d , drain current (a) 50 60 70 t j = 25 c 10v 5.0 v 4.5 v 4.0 v 3.8 v 3.6 v 3.4 v 3.2 v 3.0 v 2.8 v 100 v ds 10 v t j = 25 c t j = 125 c t j = -55 c 100 4.2 v 10 30 50 70 110 90
ntmfs4847n http://onsemi.com 4 typical characteristics figure 3. on-resistance vs. gate-to-source voltage figure 4. on-resistance vs. drain current and gate voltage v gs , gate-to-source voltage (v) i d , drain current (a) 10 9 8 7 5 4 3 2 0 0.005 0.010 0.015 0.020 0.030 0.035 0.040 110 100 90 60 50 40 30 0.008 0.002 0.003 0.004 0.005 0.006 0.007 figure 5. on-resistance variation with temperature figure 6. drain-to-source leakage current vs. voltage t j , junction temperature ( c) v ds , drain-to-source voltage (v) 125 100 75 50 25 0 -25 -50 0.6 0.8 1.0 1.2 1.4 1.8 15 10 5 100 1000 10,000 figure 7. capacitance variation figure 8. gate-to-source and drain-to-source voltage vs. total charge gate-to-source or drain-to-source voltage (v) q g , total gate charge (nc) 32 24 20 12 4 0 0 800 1200 1600 2000 2400 2800 3200 36 28 24 20 16 8 4 0 0 2 4 5 9 10 11 12 r ds(on) , drain-to-source resistance ( ) r ds(on) , drain-to-source resistance (normalized) i dss , leakage (na) c, capacitance (pf) v gs , gate-to-source voltage (v) 611 0.025 i d = 30 a t j = 25 c 70 80 120 t j = 25 c v gs = 4.5 v v gs = 11.5 v r ds(on) , drain-to-source resistance ( ) 150 i d = 30 a v gs = 10 v 20 25 t j = 150 c v gs = 0 v t j = 125 c 400 t j = 25 c c oss c iss c rss 12 32 40 8 7 6 3 1 i d = 30 a t j = 25 c qt v gs q gd q gs 1.6 828 16 44
ntmfs4847n http://onsemi.com 5 typical characteristics figure 9. resistive switching time variation vs. gate resistance figure 10. diode forward voltage vs. current r g , gate resistance ( ) v sd , source-to-drain voltage (v) 100 10 1 1 10 100 1000 0.9 0.8 0.7 0.6 0.5 0.4 0 5 figure 11. maximum rated forward biased safe operating area figure 12. maximum avalanche energy vs. starting junction temperature v ds , drain-to-source voltage (v) t j , starting junction temperature( c) 100 10 1 0.1 0.1 1 10 100 1000 75 150 125 100 50 25 0 20 40 60 120 160 180 figure 13. g fs vs. drain current figure 14. i d vs. pulse width drain current (a) pulse width ( s) 90 75 60 45 15 0 0 20 120 140 10,000 1000 100 10 1 1 10 t, time (ns) i s , source current (a) i d , drain current (a) e as , single pulse drain-to- source avalanche energy (mj) g fs (s) i d (a) v ds = 15 v i d = 15 a v gs = 11.5 v t f t r t d(off) t d(on) 10 15 20 25 30 v gs = 0 v t j = 25 c 10 s 100 s 1 ms 10 ms dc v gs = 20 v single pulse t c = 25 c r ds(on) limit thermal limit package limit 80 100 140 i d = 33 a 30 120 40 80 100 60 125 c 100 c 25 c v ds = 1.5 v 100 105
ntmfs4847n http://onsemi.com 6 package dimensions dfn6 5x6, 1.27p (so8 fl) case 488aa-01 issue c style 1: pin 1. source 2. source 3. source 4. gate 5. drain 6. drain m 3.00 3.40 0 --- 3.80 12 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeter. 3. dimension d1 and e1 do not include mold flash protrusions or gate burrs. 1234 5 6 top view side view bottom view d1 e1 d e 2 2 b a 0.20 c 0.20 c 2 x 2 x dim min nom millimeters a 0.90 1.00 a1 0.00 --- b 0.33 0.41 c 0.23 0.28 d 5.15 bsc d1 4.50 4.90 d2 3.50 --- e 6.15 bsc e1 5.50 5.80 e2 3.45 --- e 1.27 bsc g 0.51 0.61 k 0.51 --- l 0.51 0.61 l1 0.05 0.17 a 0.10 c 0.10 c detail a 14 6 l1 e/2 8x d2 g e2 k b a 0.10 b c 0.05 c l detail a a1 e 3 x c 4 x c seating plane 5 max 1.10 0.05 0.51 0.33 5.10 4.22 6.10 4.30 0.71 --- 0.71 0.20 m *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 1.270 2x 0.750 1.000 0.905 0.475 4.530 1.530 4.560 0.495 3.200 1.330 0.965 2x 2x 3x 4x 4x on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. typical parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including typicals must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800-282-9855 toll free ?usa/canada europe, middle east and africa technical support: ?phone: 421 33 790 2910 japan customer focus center ?phone: 81-3-5773-3850 ntmfs4847n/d literature fulfillment : ?literature distribution center for on semiconductor ?p.o. box 5163, denver, colorado 80217 usa ? phone : 303-675-2175 or 800-344-3860 toll free usa/canada ? fax : 303-675-2176 or 800-344-3867 toll free usa/canada ? email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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